Jongdae Kim, T. Rob, Sang-Gi Kim, Q. Song, J. Koo, K. Nam, K. Cho, D. Ma
{"title":"采用氧化物间隔片和自对准技术的高密度低导通沟槽mosfet用于DC/DC变换器","authors":"Jongdae Kim, T. Rob, Sang-Gi Kim, Q. Song, J. Koo, K. Nam, K. Cho, D. Ma","doi":"10.1109/ISPSD.2000.856848","DOIUrl":null,"url":null,"abstract":"A new process technique for fabricating very high-density trench MOSFETs using 4 mask layers with oxide spacers and self-align technique is realized. This technique reduces the process steps, trench width, and source and p-body region with a resulting increase in cell density and current driving capability, and decrease in on-resistance as well as cost-effective production capability. Specific on-resistance of 0.41 m/spl Omega/.cm/sup 2/ with a blocking voltage of 43 is obtained.","PeriodicalId":260241,"journal":{"name":"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"High-density low on-resistance trench MOSFETs employing oxide spacers and self-align technique for DC/DC converter\",\"authors\":\"Jongdae Kim, T. Rob, Sang-Gi Kim, Q. Song, J. Koo, K. Nam, K. Cho, D. Ma\",\"doi\":\"10.1109/ISPSD.2000.856848\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new process technique for fabricating very high-density trench MOSFETs using 4 mask layers with oxide spacers and self-align technique is realized. This technique reduces the process steps, trench width, and source and p-body region with a resulting increase in cell density and current driving capability, and decrease in on-resistance as well as cost-effective production capability. Specific on-resistance of 0.41 m/spl Omega/.cm/sup 2/ with a blocking voltage of 43 is obtained.\",\"PeriodicalId\":260241,\"journal\":{\"name\":\"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.2000.856848\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2000.856848","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High-density low on-resistance trench MOSFETs employing oxide spacers and self-align technique for DC/DC converter
A new process technique for fabricating very high-density trench MOSFETs using 4 mask layers with oxide spacers and self-align technique is realized. This technique reduces the process steps, trench width, and source and p-body region with a resulting increase in cell density and current driving capability, and decrease in on-resistance as well as cost-effective production capability. Specific on-resistance of 0.41 m/spl Omega/.cm/sup 2/ with a blocking voltage of 43 is obtained.
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