{"title":"差分网络中电力线通信的开关电容方法","authors":"Andreas Ott, Federico D'Aniello, A. Baschirotto","doi":"10.1109/prime55000.2022.9816780","DOIUrl":null,"url":null,"abstract":"In this paper, a direct modulated Power Line Communication (PLC) technique is presented, which realizes the transmitter part by a switched-capacitor (SC) implementation. It is shown that in terms of energy, latency and costs, the presented transmission scheme is an improvement compared to state-of-the-art carrier based solutions. Two variants of the transmitter will be analyzed that use an unshielded twisted-pair (UTP) cable to connect the network nodes differentially, while the supply of the nodes is embedded simultaneously. These PLC approaches have been verified by a discrete component based demonstrator and by a transmitter test chip, fabricated in a 180nm HV-CMOS SOI technology.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Switched Capacitor Approach for Power Line Communication in Differential Networks\",\"authors\":\"Andreas Ott, Federico D'Aniello, A. Baschirotto\",\"doi\":\"10.1109/prime55000.2022.9816780\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a direct modulated Power Line Communication (PLC) technique is presented, which realizes the transmitter part by a switched-capacitor (SC) implementation. It is shown that in terms of energy, latency and costs, the presented transmission scheme is an improvement compared to state-of-the-art carrier based solutions. Two variants of the transmitter will be analyzed that use an unshielded twisted-pair (UTP) cable to connect the network nodes differentially, while the supply of the nodes is embedded simultaneously. These PLC approaches have been verified by a discrete component based demonstrator and by a transmitter test chip, fabricated in a 180nm HV-CMOS SOI technology.\",\"PeriodicalId\":142196,\"journal\":{\"name\":\"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/prime55000.2022.9816780\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/prime55000.2022.9816780","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Switched Capacitor Approach for Power Line Communication in Differential Networks
In this paper, a direct modulated Power Line Communication (PLC) technique is presented, which realizes the transmitter part by a switched-capacitor (SC) implementation. It is shown that in terms of energy, latency and costs, the presented transmission scheme is an improvement compared to state-of-the-art carrier based solutions. Two variants of the transmitter will be analyzed that use an unshielded twisted-pair (UTP) cable to connect the network nodes differentially, while the supply of the nodes is embedded simultaneously. These PLC approaches have been verified by a discrete component based demonstrator and by a transmitter test chip, fabricated in a 180nm HV-CMOS SOI technology.