二次晶圆级集成:有源相控阵的新方法

L. Whicker, J.J. Zingaro, M. Driver, R. C. Clarke
{"title":"二次晶圆级集成:有源相控阵的新方法","authors":"L. Whicker, J.J. Zingaro, M. Driver, R. C. Clarke","doi":"10.1109/ICWSI.1990.63882","DOIUrl":null,"url":null,"abstract":"Describes a new approach to active phased array technology. Here, several modules are fabricated at the same time and placed in a layered structure. The layers include the RF modules, cooling manifold, DC bias distribution, RF manifold, and radiating elements. In this configuration, 16 or more T/R modules are fabricated on a single 3-inch GaAs wafer. The realization of multiple modules on a wafer is made possible by redundancy of circuit elements and novel mechanical switches. Preliminary results on these efforts are presented.<<ETX>>","PeriodicalId":206140,"journal":{"name":"1990 Proceedings. International Conference on Wafer Scale Integration","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-01-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Re-wafer scale integration: a new approach to active phased arrays\",\"authors\":\"L. Whicker, J.J. Zingaro, M. Driver, R. C. Clarke\",\"doi\":\"10.1109/ICWSI.1990.63882\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Describes a new approach to active phased array technology. Here, several modules are fabricated at the same time and placed in a layered structure. The layers include the RF modules, cooling manifold, DC bias distribution, RF manifold, and radiating elements. In this configuration, 16 or more T/R modules are fabricated on a single 3-inch GaAs wafer. The realization of multiple modules on a wafer is made possible by redundancy of circuit elements and novel mechanical switches. Preliminary results on these efforts are presented.<<ETX>>\",\"PeriodicalId\":206140,\"journal\":{\"name\":\"1990 Proceedings. International Conference on Wafer Scale Integration\",\"volume\":\"57 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-01-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1990 Proceedings. International Conference on Wafer Scale Integration\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICWSI.1990.63882\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1990 Proceedings. International Conference on Wafer Scale Integration","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICWSI.1990.63882","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

介绍了一种新的有源相控阵技术。在这里,几个模块被同时制作并放置在一个分层结构中。这些层包括射频模块、冷却流形、直流偏置分布、射频流形和辐射元件。在这种配置下,在一块3英寸的砷化镓晶圆上可以制造16个或更多的T/R模块。通过冗余的电路元件和新颖的机械开关,可以在晶圆上实现多个模块。提出了这些努力的初步结果
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Re-wafer scale integration: a new approach to active phased arrays
Describes a new approach to active phased array technology. Here, several modules are fabricated at the same time and placed in a layered structure. The layers include the RF modules, cooling manifold, DC bias distribution, RF manifold, and radiating elements. In this configuration, 16 or more T/R modules are fabricated on a single 3-inch GaAs wafer. The realization of multiple modules on a wafer is made possible by redundancy of circuit elements and novel mechanical switches. Preliminary results on these efforts are presented.<>
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