{"title":"Passim:用于无源/spl Delta//spl Sigma/ ADC和无源开关c滤波器的快速模拟器","authors":"E. Hegazi, R. Yousry","doi":"10.1109/ICEEC.2004.1374504","DOIUrl":null,"url":null,"abstract":"We report on a fast simulator for passive delta sigma analog-to-digital converters and general passive filters. An algorithm that relies on discrete time circuit partitioning is devised to reduce simulation time. Test cases include a complete passive δΣADC that meets the specification of GSM, Bluetooth and WCDMA.","PeriodicalId":180043,"journal":{"name":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Passim: a fast simulator for passive /spl Delta//spl Sigma/ ADC and passive switched-C filters\",\"authors\":\"E. Hegazi, R. Yousry\",\"doi\":\"10.1109/ICEEC.2004.1374504\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report on a fast simulator for passive delta sigma analog-to-digital converters and general passive filters. An algorithm that relies on discrete time circuit partitioning is devised to reduce simulation time. Test cases include a complete passive δΣADC that meets the specification of GSM, Bluetooth and WCDMA.\",\"PeriodicalId\":180043,\"journal\":{\"name\":\"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-09-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEEC.2004.1374504\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEEC.2004.1374504","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Passim: a fast simulator for passive /spl Delta//spl Sigma/ ADC and passive switched-C filters
We report on a fast simulator for passive delta sigma analog-to-digital converters and general passive filters. An algorithm that relies on discrete time circuit partitioning is devised to reduce simulation time. Test cases include a complete passive δΣADC that meets the specification of GSM, Bluetooth and WCDMA.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
