NiSi多晶硅熔断器可靠性在65nm逻辑CMOS技术

2006 IEEE International Integrated Reliability Workshop Final Report Pub Date : 2006-10-01 DOI:10.1109/IRWS.2006.305218

Boon Ang, S. Tumakha, J. Im, S. Paak

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引用次数: 4

摘要

研究了采用65nm逻辑CMOS工艺制作的NiSi多晶硅熔断器的编程特性和可靠性。在最优规划条件下，可实现较高的程序后电阻。这些程序良好的熔断器显示了良好的数据保留，能够满足大多数应用的工作寿命要求

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NiSi Polysilicon Fuse Reliability in 65nm Logic CMOS Technology

The programming characteristics and reliability of NiSi polysilicon fuse fabricated using 65nm logic CMOS technology were studied. Under optimal programming conditions, high post-program resistance can be achieved. These well programmed fuses showed good data retention, capable of meeting the operating lifetime requirement of most applications

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2006 IEEE International Integrated Reliability Workshop Final Report

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