基于VHDL的可控任意整数分频器

H. Tian, Shuo Shi, Jun Zhang, Hong-Dong Zhao
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引用次数: 2

摘要

分频器设计的关键技术是在输入和输出之间找到一个函数。一般来说,分频器的设计过程和电路比较复杂,修改和移植比较困难。本文提出了一种新颖的可控任意整数分频器(CAIFD)的设计方法,利用VHSIC硬件描述语言(Hardware Description Language, VHDL)源代码合成FPGA (Field Programmable Gate Array,现场可编程门阵列)或CPLD (Complex Programmable Logic Device,复杂可编程逻辑器件)电路,产生50%占空比n (n为整数,n比0)的可控波形。为了验证设计方法,在ALTERA公司的EP2S15F484C3器件上对具有不同频率系数的CAIFD进行了仿真。实验结果表明,该系统易于修改和移植,且性能稳定可靠。
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Controllable Arbitrary Integer Frequency Divider Based on VHDL
The key technique for the design of a frequency divider is to find a function between the input and output. In general, the design process and circuit of a frequency divider is complicated, modification and transplantation for it is difficult. A creative design method of CAIFD (Controllable Arbitrary Integer Frequency Divider) is presented in this paper, which uses the VHDL (VHSIC Hardware Description Language ) source code to synthesize a FPGA (Field Programmable Gate Array) or a CPLD (Complex Programmable Logic Device) circuit that produces a 50% duty cycle n (n is a integer and n≫0 ) controllable waveform. In order to validate the design method, CAIFD which has different frequency coefficients is simulated in device of ALTERA Corporation's EP2S15F484C3. Results of the experiment shows that modification and transplantation of CAIFD is easy, moreover the performance is steady and reliable.
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