{"title":"快速成型异步处理器","authors":"W.B. Puah, B. Suparjo, R. Wagiran, R. Sidek","doi":"10.1109/SMELEC.2000.932467","DOIUrl":null,"url":null,"abstract":"Asynchronous processors are an attractive research field, since they offer many advantages over synchronous processors. Field-programmable gate arrays (FPGA), one of the dominant media at present for prototyping and implementing digital circuits, is used to construct an 8-bit asynchronous RISC processor. The asynchronous processor employs the conceptual framework of a Sutherland micropipeline, a modular approach to design of asynchronous circuits.","PeriodicalId":359114,"journal":{"name":"ICSE 2000. 2000 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.00EX425)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Rapid prototyping asynchronous processor\",\"authors\":\"W.B. Puah, B. Suparjo, R. Wagiran, R. Sidek\",\"doi\":\"10.1109/SMELEC.2000.932467\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Asynchronous processors are an attractive research field, since they offer many advantages over synchronous processors. Field-programmable gate arrays (FPGA), one of the dominant media at present for prototyping and implementing digital circuits, is used to construct an 8-bit asynchronous RISC processor. The asynchronous processor employs the conceptual framework of a Sutherland micropipeline, a modular approach to design of asynchronous circuits.\",\"PeriodicalId\":359114,\"journal\":{\"name\":\"ICSE 2000. 2000 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.00EX425)\",\"volume\":\"21 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-11-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ICSE 2000. 2000 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.00EX425)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SMELEC.2000.932467\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICSE 2000. 2000 IEEE International Conference on Semiconductor Electronics. Proceedings (Cat. No.00EX425)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMELEC.2000.932467","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Asynchronous processors are an attractive research field, since they offer many advantages over synchronous processors. Field-programmable gate arrays (FPGA), one of the dominant media at present for prototyping and implementing digital circuits, is used to construct an 8-bit asynchronous RISC processor. The asynchronous processor employs the conceptual framework of a Sutherland micropipeline, a modular approach to design of asynchronous circuits.