{"title":"基于fpga的PGNAA频谱测量脉冲堆积抑制技术","authors":"C. Lian, Liang Futian, Liu Yuzhe, Li Feng, Jin Ge","doi":"10.1109/RTC.2016.7543083","DOIUrl":null,"url":null,"abstract":"In this paper, a FPGA-based pulse pile-up rejection method for the high count rate gamma spectrometer of PGNAA is reported. By using fast peak seeking and feedback control, the pulse width can be narrowed then the pile-up events will be reduced. Test results shown that the energy resolution of the spectrometer is closed to the commercial products. For a count rate of 400 kHz, the number of pile-up events is reduced by 15.84%. This method is easy to implement in FPGAs for real-time data processing.","PeriodicalId":383702,"journal":{"name":"2016 IEEE-NPSS Real Time Conference (RT)","volume":"467 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A FPGA-based pulse pile-up rejection technique for the spectrum measurement in PGNAA\",\"authors\":\"C. Lian, Liang Futian, Liu Yuzhe, Li Feng, Jin Ge\",\"doi\":\"10.1109/RTC.2016.7543083\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a FPGA-based pulse pile-up rejection method for the high count rate gamma spectrometer of PGNAA is reported. By using fast peak seeking and feedback control, the pulse width can be narrowed then the pile-up events will be reduced. Test results shown that the energy resolution of the spectrometer is closed to the commercial products. For a count rate of 400 kHz, the number of pile-up events is reduced by 15.84%. This method is easy to implement in FPGAs for real-time data processing.\",\"PeriodicalId\":383702,\"journal\":{\"name\":\"2016 IEEE-NPSS Real Time Conference (RT)\",\"volume\":\"467 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE-NPSS Real Time Conference (RT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RTC.2016.7543083\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE-NPSS Real Time Conference (RT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RTC.2016.7543083","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A FPGA-based pulse pile-up rejection technique for the spectrum measurement in PGNAA
In this paper, a FPGA-based pulse pile-up rejection method for the high count rate gamma spectrometer of PGNAA is reported. By using fast peak seeking and feedback control, the pulse width can be narrowed then the pile-up events will be reduced. Test results shown that the energy resolution of the spectrometer is closed to the commercial products. For a count rate of 400 kHz, the number of pile-up events is reduced by 15.84%. This method is easy to implement in FPGAs for real-time data processing.
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