Building a 1588 system solution — Key learnings

The Intel-PSG division focused on FPGAs, has always delivered the hardware Intellectual Property (IP) cores that include both soft cores (synthesizable code) and hard cores (already routed and supplied with the FPGA), that can integrate well with firmware and application software in a system. The 1588 Precision Timing Protocol (1588-PTP) solution spans both software and hardware and the accuracy reported at a system level has more credibility than the accuracy reported at the hardware level. Hence, the Intel-PSG has chosen the route of open-source stack available with the Linux and built its 1588 RD (Reference Design) solution comprising its already established 1588 hardware IP. The system solution has achieved an accuracy of around 7ns in an Ordinary Clock system comprising one master clock and one slave clock. This article details the objectives of the 1588 RD solution, the technical process of achieving the objectives and key learnings in the whole exercise. Specifically, the article focuses on the key system level decisions viz., (a) choosing FIFO/DMA/TCAM (b) Timestamping all the packets vs timestamping only the PTP packets. The article further details the software and hardware architecture and their internal design details, the PTP packet flow and the procedure of arriving at the system level accuracy. Key learnings and scope for future work conclude the article.