射频诱导通信误差在RFFE MIPI控制的功率放大器

D. Teeter, Ming Ji, David Southcombe, Praveen Nadimpalli, D. Widay
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摘要

随着移动设备内部射频组件数量的增加,业界已经迅速采用并利用MIPI的RFFE串行总线规范[1]与这些设备通信,并减少组件之间的控制线路由数量。然而,在射频前端使用串行总线增加了射频能量的风险,特别是来自功率放大器(PA)的能量,可能会破坏RFFE总线通信。射频耦合到诸如在PA的RFFE状态机中看到的RFFE串行时钟(SCLK)信号的区域可能导致与PA的通信错误。这种耦合可以是SCLK信号本身,也可以是PA的CMOS控制器的接地基准。PA设计人员必须特别注意CMOS控制器的定位和设计以及信号到控制器的内部路由,以避免这些问题。本文详细分析了射频能量耦合到内部CMOS控制器如何在SCLK信号上产生导致通信错误的“小故障”。本文提供了一个简单的示例来说明PA模块布局中的选择如何对这些问题产生重大影响。这些概念的自然延伸也适用于手机或无线电板布局。
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RF induced communication errors in RFFE MIPI controlled Power Amplifiers
As the number of RF components increases inside mobile devices, the industry has rapidly adopted and utilized MIPI's RFFE serial bus specification [1] to communicate with these devices and reduce the amount of control line routing between components. However, the use of a serial bus within the RF front end increases the risk that RF energy, particularly from the Power Amplifier (PA), can corrupt the RFFE bus communication. RF coupling to areas such as the RFFE serial clock (SCLK) signal seen within the PA's RFFE state machine can result in communication errors with the PA. This coupling can be to the SCLK signal itself, or to the PA's CMOS controller's ground reference. PA designers must pay special attention to the positioning and design of the CMOS controller and the internal routing of signals to the controller to avoid these problems. This paper provides a detailed analysis of how RF energy coupling to the internal CMOS controller can create “glitches” on the SCLK signal that cause communication errors. A simple example is provided to illustrate how choices in PA module layout can significantly impact these issues. A natural extension of these concepts applies to phone or radio board layouts, too.
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