{"title":"设计因素及其对PCB成品率的影响——统计和神经网络预测模型","authors":"Y. Li, R.L. Mahajan, J. Tong","doi":"10.1109/IEMT.1993.398182","DOIUrl":null,"url":null,"abstract":"The authors relate circuit board design features to assembly yields. Design parameters that may affect the assembly yield are identified using knowledge of the assembly process. These parameters are then quantified for a set of board designs and related to the actual assembly yields by statistical regression models and artificial neural network models. These models are able to predict the assembly yield with a root-mean-square (RMS) error less than 5%. They can be used to predict the assembly yield for new board designs on the same line. Alternatively, they can be used to compare the performance of different lines by comparing the expected yields for a given design with the actual yields.<<ETX>>","PeriodicalId":206206,"journal":{"name":"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"29","resultStr":"{\"title\":\"Design factors and their effect on PCB assembly yield - Statistical and neural network predictive models\",\"authors\":\"Y. Li, R.L. Mahajan, J. Tong\",\"doi\":\"10.1109/IEMT.1993.398182\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors relate circuit board design features to assembly yields. Design parameters that may affect the assembly yield are identified using knowledge of the assembly process. These parameters are then quantified for a set of board designs and related to the actual assembly yields by statistical regression models and artificial neural network models. These models are able to predict the assembly yield with a root-mean-square (RMS) error less than 5%. They can be used to predict the assembly yield for new board designs on the same line. Alternatively, they can be used to compare the performance of different lines by comparing the expected yields for a given design with the actual yields.<<ETX>>\",\"PeriodicalId\":206206,\"journal\":{\"name\":\"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-10-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"29\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.1993.398182\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.1993.398182","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design factors and their effect on PCB assembly yield - Statistical and neural network predictive models
The authors relate circuit board design features to assembly yields. Design parameters that may affect the assembly yield are identified using knowledge of the assembly process. These parameters are then quantified for a set of board designs and related to the actual assembly yields by statistical regression models and artificial neural network models. These models are able to predict the assembly yield with a root-mean-square (RMS) error less than 5%. They can be used to predict the assembly yield for new board designs on the same line. Alternatively, they can be used to compare the performance of different lines by comparing the expected yields for a given design with the actual yields.<>