Feifei Chen, Yunshan Wang, Jung-Lin Lin, Zuo‐Min Tsai, Huei Wang
{"title":"一种采用90纳米CMOS的24 ghz高线性下变频混频器","authors":"Feifei Chen, Yunshan Wang, Jung-Lin Lin, Zuo‐Min Tsai, Huei Wang","doi":"10.1109/RFIT.2018.8524128","DOIUrl":null,"url":null,"abstract":"A 24-GHz high linearity down-conversion mixer in 90-nm CMOS is presented in this paper. The mixer utilizes folded architecture, LC tank, distributed derivative superposition (DS) linearization technique to achieve high linearity with relatively low power. The mixer achieves 0 dBm $\\boldsymbol{IP}_{1\\mathbf{dB}}$. The mixer provides −3 dB conversion gain and the IIP3 is 21 dBm with only 10-mW dc consumption.","PeriodicalId":297122,"journal":{"name":"2018 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A 24-GHz High Linearity Down-conversion Mixer in 90-nm CMOS\",\"authors\":\"Feifei Chen, Yunshan Wang, Jung-Lin Lin, Zuo‐Min Tsai, Huei Wang\",\"doi\":\"10.1109/RFIT.2018.8524128\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 24-GHz high linearity down-conversion mixer in 90-nm CMOS is presented in this paper. The mixer utilizes folded architecture, LC tank, distributed derivative superposition (DS) linearization technique to achieve high linearity with relatively low power. The mixer achieves 0 dBm $\\\\boldsymbol{IP}_{1\\\\mathbf{dB}}$. The mixer provides −3 dB conversion gain and the IIP3 is 21 dBm with only 10-mW dc consumption.\",\"PeriodicalId\":297122,\"journal\":{\"name\":\"2018 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIT.2018.8524128\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIT.2018.8524128","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 24-GHz High Linearity Down-conversion Mixer in 90-nm CMOS
A 24-GHz high linearity down-conversion mixer in 90-nm CMOS is presented in this paper. The mixer utilizes folded architecture, LC tank, distributed derivative superposition (DS) linearization technique to achieve high linearity with relatively low power. The mixer achieves 0 dBm $\boldsymbol{IP}_{1\mathbf{dB}}$. The mixer provides −3 dB conversion gain and the IIP3 is 21 dBm with only 10-mW dc consumption.