单端SRAM操作的非对称写辅助

2009 IEEE International SOC Conference (SOCC) Pub Date : 2009-09-01 DOI:10.1109/SOCCON.2009.5398086

Jihi-Yu Lin, Ming-Hsien Tu, Ming-Chien Tsai, S. Jou, C. Chuang

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引用次数: 7

摘要

为了提高单端读写8T SRAM单元的读静态噪声余量(RSNM)、写余量(WM)和运行速度，提出了非对称写辅助单元虚拟地偏置和正反馈感知保持方案。采用90nm CMOS技术实现的4Kbit SRAM在6MHz时平均功耗为1uW/bit，在6MHz时Vmin为410mV，在600mV时最大工作频率为234MHz。

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Asymmetrical Write-assist for single-ended SRAM operation

In this paper, asymmetrical Write-assist cell virtual ground biasing and positive feedback sensing keeper schemes are proposed to improve the Read Static Noise Margin (RSNM), Write Margin (WM), and operation speed of a single-ended Read/Write 8T SRAM cell. A 4Kbit SRAM implemented in 90nm CMOS technology achieves 1uW/bit average power consumption at 6MHz, Vmin of 410mV at 6MHz, and 234MHz maximum operation frequency at 600mV.

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2009 IEEE International SOC Conference (SOCC)

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