{"title":"多值逻辑电路的全灵敏度和测试生成","authors":"E. Dubrova, D. Gurov, J. Muzio","doi":"10.1109/ISMVL.1994.302189","DOIUrl":null,"url":null,"abstract":"The notion of full sensitivity in a multiple-valued logic (MVL) circuit is introduced. A formalization of this notion using a specially defined operator, called mutual exclusion, is given. An expression of full sensitivity in the functional base of J.B. Rosser and A.R. Turquette (1952) is presented. The usefulness of this functional transformation with respect to test generation for MVL circuits is investigated.<<ETX>>","PeriodicalId":137138,"journal":{"name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Full sensitivity and test generation for multiple-valued logic circuits\",\"authors\":\"E. Dubrova, D. Gurov, J. Muzio\",\"doi\":\"10.1109/ISMVL.1994.302189\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The notion of full sensitivity in a multiple-valued logic (MVL) circuit is introduced. A formalization of this notion using a specially defined operator, called mutual exclusion, is given. An expression of full sensitivity in the functional base of J.B. Rosser and A.R. Turquette (1952) is presented. The usefulness of this functional transformation with respect to test generation for MVL circuits is investigated.<<ETX>>\",\"PeriodicalId\":137138,\"journal\":{\"name\":\"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-05-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.1994.302189\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.1994.302189","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Full sensitivity and test generation for multiple-valued logic circuits
The notion of full sensitivity in a multiple-valued logic (MVL) circuit is introduced. A formalization of this notion using a specially defined operator, called mutual exclusion, is given. An expression of full sensitivity in the functional base of J.B. Rosser and A.R. Turquette (1952) is presented. The usefulness of this functional transformation with respect to test generation for MVL circuits is investigated.<>
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