{"title":"考虑感测放大器频闪信号的纳米SRAM性能良率分析模型","authors":"J. Ryan, Sudhanshu Khanna, B. Calhoun","doi":"10.1109/ISLPED.2011.5993653","DOIUrl":null,"url":null,"abstract":"This paper presents a model for the exact distribution of performance yield in an SRAM using order statistics for strobed and non-strobed sense amplifier (SA) implementations. Monte-Carlo simulation results validate the model, which offers a speedup in runtime of 3 to 4 orders of magnitude. Using the model, we quantify the potential benefits of using a non-strobed SA in different types of system architectures.","PeriodicalId":117694,"journal":{"name":"IEEE/ACM International Symposium on Low Power Electronics and Design","volume":"124 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"An analytical model for performance yield of nanoscale SRAM accounting for the sense amplifier strobe signal\",\"authors\":\"J. Ryan, Sudhanshu Khanna, B. Calhoun\",\"doi\":\"10.1109/ISLPED.2011.5993653\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a model for the exact distribution of performance yield in an SRAM using order statistics for strobed and non-strobed sense amplifier (SA) implementations. Monte-Carlo simulation results validate the model, which offers a speedup in runtime of 3 to 4 orders of magnitude. Using the model, we quantify the potential benefits of using a non-strobed SA in different types of system architectures.\",\"PeriodicalId\":117694,\"journal\":{\"name\":\"IEEE/ACM International Symposium on Low Power Electronics and Design\",\"volume\":\"124 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE/ACM International Symposium on Low Power Electronics and Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISLPED.2011.5993653\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE/ACM International Symposium on Low Power Electronics and Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISLPED.2011.5993653","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An analytical model for performance yield of nanoscale SRAM accounting for the sense amplifier strobe signal
This paper presents a model for the exact distribution of performance yield in an SRAM using order statistics for strobed and non-strobed sense amplifier (SA) implementations. Monte-Carlo simulation results validate the model, which offers a speedup in runtime of 3 to 4 orders of magnitude. Using the model, we quantify the potential benefits of using a non-strobed SA in different types of system architectures.
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