G. Su, Li-heng Lou, Lingling Sun, Jun Liu, J. Wen, Xiangyu Lv
{"title":"采用定制片上电感的93.9-105.6 GHz放大器","authors":"G. Su, Li-heng Lou, Lingling Sun, Jun Liu, J. Wen, Xiangyu Lv","doi":"10.1109/EDSSC.2017.8126411","DOIUrl":null,"url":null,"abstract":"A five-stage 93.9 GHz-105.6 GHz common-source CMOS amplifier is presented in this paper. The customized on-chip inductor and transmission line (TL) are designed for matching networks. Fabricated in a 65nm bulk CMOS process, this amplifier achieves a peak gain of 9 dB at 100 GHz and 11.7GHz 3-dB bandwidth range from 93.9 GHz to 105.6 GHz, consuming total power of 49.2 mW under 1.2 V voltage supply. The area of this amplifier is 0.5mm2 including pads.","PeriodicalId":163598,"journal":{"name":"2017 International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 93.9–105.6 GHz amplifier using customized on-chip inductor\",\"authors\":\"G. Su, Li-heng Lou, Lingling Sun, Jun Liu, J. Wen, Xiangyu Lv\",\"doi\":\"10.1109/EDSSC.2017.8126411\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A five-stage 93.9 GHz-105.6 GHz common-source CMOS amplifier is presented in this paper. The customized on-chip inductor and transmission line (TL) are designed for matching networks. Fabricated in a 65nm bulk CMOS process, this amplifier achieves a peak gain of 9 dB at 100 GHz and 11.7GHz 3-dB bandwidth range from 93.9 GHz to 105.6 GHz, consuming total power of 49.2 mW under 1.2 V voltage supply. The area of this amplifier is 0.5mm2 including pads.\",\"PeriodicalId\":163598,\"journal\":{\"name\":\"2017 International Conference on Electron Devices and Solid-State Circuits (EDSSC)\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 International Conference on Electron Devices and Solid-State Circuits (EDSSC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDSSC.2017.8126411\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International Conference on Electron Devices and Solid-State Circuits (EDSSC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2017.8126411","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 93.9–105.6 GHz amplifier using customized on-chip inductor
A five-stage 93.9 GHz-105.6 GHz common-source CMOS amplifier is presented in this paper. The customized on-chip inductor and transmission line (TL) are designed for matching networks. Fabricated in a 65nm bulk CMOS process, this amplifier achieves a peak gain of 9 dB at 100 GHz and 11.7GHz 3-dB bandwidth range from 93.9 GHz to 105.6 GHz, consuming total power of 49.2 mW under 1.2 V voltage supply. The area of this amplifier is 0.5mm2 including pads.