采用0.18 μm CMOS片上电感,非接触式10%高效36mW功率输出

Yuan Yuxiang, Y. Yoshida, T. Kuroda
{"title":"采用0.18 μm CMOS片上电感,非接触式10%高效36mW功率输出","authors":"Yuan Yuxiang, Y. Yoshida, T. Kuroda","doi":"10.1109/ASSCC.2007.4425745","DOIUrl":null,"url":null,"abstract":"This paper presents design and implementation of an inductive coupling power delivery system between stacked chips in 0.18-mum CMOS process. Two conventional high-power rectifier structures are compared, and a new topology is proposed. With a pair of fully optimized 700 mum times 700 mum on-chip inductors, the test chip achieves 10% peak efficiency and 36 mW power transmission. Compared with previous published chip-to-chip wireless power transmission systems, the received power is 13 times larger.","PeriodicalId":186095,"journal":{"name":"2007 IEEE Asian Solid-State Circuits Conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"28","resultStr":"{\"title\":\"Non-contact 10% efficient 36mW power delivery using on-chip inductor in 0.18-μm CMOS\",\"authors\":\"Yuan Yuxiang, Y. Yoshida, T. Kuroda\",\"doi\":\"10.1109/ASSCC.2007.4425745\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents design and implementation of an inductive coupling power delivery system between stacked chips in 0.18-mum CMOS process. Two conventional high-power rectifier structures are compared, and a new topology is proposed. With a pair of fully optimized 700 mum times 700 mum on-chip inductors, the test chip achieves 10% peak efficiency and 36 mW power transmission. Compared with previous published chip-to-chip wireless power transmission systems, the received power is 13 times larger.\",\"PeriodicalId\":186095,\"journal\":{\"name\":\"2007 IEEE Asian Solid-State Circuits Conference\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"28\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Asian Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSCC.2007.4425745\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2007.4425745","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 28

摘要

本文介绍了一种0.18 μ m CMOS工艺中堆叠芯片间电感耦合功率传输系统的设计与实现。比较了两种传统的大功率整流器结构,提出了一种新的拓扑结构。采用一对完全优化的700 μ m × 700 μ m片上电感,测试芯片达到10%的峰值效率和36 mW的功率传输。与之前发布的片对片无线电力传输系统相比,接收功率提高了13倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Non-contact 10% efficient 36mW power delivery using on-chip inductor in 0.18-μm CMOS
This paper presents design and implementation of an inductive coupling power delivery system between stacked chips in 0.18-mum CMOS process. Two conventional high-power rectifier structures are compared, and a new topology is proposed. With a pair of fully optimized 700 mum times 700 mum on-chip inductors, the test chip achieves 10% peak efficiency and 36 mW power transmission. Compared with previous published chip-to-chip wireless power transmission systems, the received power is 13 times larger.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A Field-programmable VLSI based on an asynchronous bit-serial architecture MuCCRA chips: Configurable dynamically-reconfigurable processors Interference from power/signal lines and to SRAM circuits in 65nm CMOS inductive-coupling link 40 frames/sec 16×16 temperature probe array using 90nm 1V CMOS for on-line thermal monitoring on VLSI chip A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1