Developing and Testing the Wavelet Modulation Technique for 3φ, 5-Level, PECs

This work extends the wavelet modulation (WM) technique for operating three-phase (3φ), 5-level power electronic converters (PECs). The WM technique is extended by resolution-segmentation of the synthesis scale-based linearly-combined wavelet functions, which are used as switching signals. The resolution-segmentation is created based on the dilation property of synthesis scale-based linearly-combined wavelet functions. Each leg of the 3φ VS, 5-level dc-ac PEC is operated by two sets of resolution-segmented synthesis scale-based linearly-combined wavelet basis functions to produce the voltage of one phase. The extended WM technique is implemented for performance testing, when operating 3φ VS, 5-level, diode-clamped and flying-capacitor dc-ac PECs. In this paper simulation test results are presented and compared with results obtained using the level-shifted pulse-width modulation (PWM), phase-shifted PWM, and space vector modulation. Test results show significant reductions of output harmonics, along with improvements in fundamental components of output voltages and PEC efficiency.