探索FIR滤波器在图形处理单元上实现的可扩展性

2010 IEEE International Conference on Electro/Information Technology Pub Date : 2010-05-20 DOI:10.1109/EIT.2010.5612114

Jeff Rebacz, E. Oruklu, J. Saniie

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引用次数: 3

摘要

由于简化图形卡编程的架构和软件的发布，GPGPU最近引起了极大的兴趣。本研究探讨了FIR数字滤波器的性能如何通过改变抽头和采样的数量来衡量。我们还讨论了在CUDA中GPGPU编程的各种技术的权衡。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Exploring scalability of FIR filter realizations on Graphics Processing Units

General-Purpose Computing on Graphics Processing Units (GPGPU) has lately been of great interest due to the release of architectures and software that simplifies programming graphics cards. This study explores how performance scales with FIR digital filters by varying the number of taps and the samples. We also discuss the trade-offs with various techniques for GPGPU programming in CUDA.

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2010 IEEE International Conference on Electro/Information Technology

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