{"title":"计算机体系结构教育中基于FPGA的RISC-V处理器设计框架与工具","authors":"Tyler McGrew, Eric Schonauer","doi":"10.1109/CSCI49370.2019.00148","DOIUrl":null,"url":null,"abstract":"Arguably, each computer engineer undergrad should build a simple processor in the pursuit of their degree to help them internalize the basic design principles and properties of a computer. With the proliferation of FPGAs in universities this is, easily, realizable in most undergraduate curricula. Many modern courses on computer architecture or organization rely on MIPS architectures (among others) as the base processor to learn with, but the MIPS architecture has little commercial success and real-world implementations that will allow students to get additional career benefit from building and learning about a used architecture. The increasing industrial interest of RISCV ISA, its free availability, and its early success in real-world adoption makes this processor a great potential candidate in this educational space. This work provides suggestions on how undergraduates should build a RISC-V architecture on an FPGA, and a basic framework of tools and design principles for this exercise.","PeriodicalId":103662,"journal":{"name":"2019 International Conference on Computational Science and Computational Intelligence (CSCI)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Framework and Tools for Undergraduates Designing RISC-V Processors on an FPGA in Computer Architecture Education\",\"authors\":\"Tyler McGrew, Eric Schonauer\",\"doi\":\"10.1109/CSCI49370.2019.00148\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Arguably, each computer engineer undergrad should build a simple processor in the pursuit of their degree to help them internalize the basic design principles and properties of a computer. With the proliferation of FPGAs in universities this is, easily, realizable in most undergraduate curricula. Many modern courses on computer architecture or organization rely on MIPS architectures (among others) as the base processor to learn with, but the MIPS architecture has little commercial success and real-world implementations that will allow students to get additional career benefit from building and learning about a used architecture. The increasing industrial interest of RISCV ISA, its free availability, and its early success in real-world adoption makes this processor a great potential candidate in this educational space. This work provides suggestions on how undergraduates should build a RISC-V architecture on an FPGA, and a basic framework of tools and design principles for this exercise.\",\"PeriodicalId\":103662,\"journal\":{\"name\":\"2019 International Conference on Computational Science and Computational Intelligence (CSCI)\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 International Conference on Computational Science and Computational Intelligence (CSCI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSCI49370.2019.00148\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International Conference on Computational Science and Computational Intelligence (CSCI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSCI49370.2019.00148","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Framework and Tools for Undergraduates Designing RISC-V Processors on an FPGA in Computer Architecture Education
Arguably, each computer engineer undergrad should build a simple processor in the pursuit of their degree to help them internalize the basic design principles and properties of a computer. With the proliferation of FPGAs in universities this is, easily, realizable in most undergraduate curricula. Many modern courses on computer architecture or organization rely on MIPS architectures (among others) as the base processor to learn with, but the MIPS architecture has little commercial success and real-world implementations that will allow students to get additional career benefit from building and learning about a used architecture. The increasing industrial interest of RISCV ISA, its free availability, and its early success in real-world adoption makes this processor a great potential candidate in this educational space. This work provides suggestions on how undergraduates should build a RISC-V architecture on an FPGA, and a basic framework of tools and design principles for this exercise.