{"title":"提高性能的CMOS OTA","authors":"Shi-Cai Qin, Xiangluan Jia, Yong-Ping Wang","doi":"10.1109/TENCON.1995.496357","DOIUrl":null,"url":null,"abstract":"A new CMOS OTA which consists of a linearized source-coupled pair cascaded by a conventional CMOS OTA biased in sub-threshold region is presented. SPICE simulation results show that for /spl plusmn/5 V supply voltage, and over /spl plusmn/3 V input range, the maximum non-linear error is /spl plusmn/0.3% and the transconductance varies I/sub abc/ linearly over a wide I/sub abc/ range.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"CMOS OTA with improve performance\",\"authors\":\"Shi-Cai Qin, Xiangluan Jia, Yong-Ping Wang\",\"doi\":\"10.1109/TENCON.1995.496357\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new CMOS OTA which consists of a linearized source-coupled pair cascaded by a conventional CMOS OTA biased in sub-threshold region is presented. SPICE simulation results show that for /spl plusmn/5 V supply voltage, and over /spl plusmn/3 V input range, the maximum non-linear error is /spl plusmn/0.3% and the transconductance varies I/sub abc/ linearly over a wide I/sub abc/ range.\",\"PeriodicalId\":425138,\"journal\":{\"name\":\"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-11-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TENCON.1995.496357\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TENCON.1995.496357","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new CMOS OTA which consists of a linearized source-coupled pair cascaded by a conventional CMOS OTA biased in sub-threshold region is presented. SPICE simulation results show that for /spl plusmn/5 V supply voltage, and over /spl plusmn/3 V input range, the maximum non-linear error is /spl plusmn/0.3% and the transconductance varies I/sub abc/ linearly over a wide I/sub abc/ range.
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