制备1.6 kv Ar+植入端端击穿设计Ni/n-SiC肖特基势垒二极管与异质结p-NiO/n-SiC二极管的综合比较

Atsushi Shimbori, H. Wong, A. Huang
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引用次数: 0

摘要

通过制作、电学评价、TCAD仿真分析和反向恢复评价,对Ar+植入边缘端接的Ni/SiC打孔肖特基二极管和异质结NiO/SiC二极管进行了全面比较。两种制造的二极管都具有1595V的高击穿电压,采用穿孔设计。由于更高的势垒高度,异质结NiO/SiC二极管显示出×0.5比Ni/SiC肖特基二极管更少的反向泄漏电流。另一方面,Ni/SiC肖特基二极管的反向恢复时间减少了90%,这表明异质结NiO/SiC二极管的少数载流子注入程度很小。
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Comprehensive Comparison of Fabricated 1.6-kV Punch-Through Design Ni/n-SiC Schottky Barrier Diode with Ar+ Implant Edge Termination and Heterojunction p-NiO/n-SiC Diode
A comprehensive comparison of a punch-through Ni/SiC Schottky diode with Ar+ implant edge termination and heterojunction NiO/SiC diode were conducted through fabrication, electrical evaluation, TCAD simulation analysis and reverse recovery evaluation. Both fabricated diodes exhibit high breakdown voltage of 1595V, utilizing a punch-through design. The heterojunction NiO/SiC diode has shown ×0.5 less reverse leakage current than the Ni/SiC Schottky diode due to higher barrier height. The Ni/SiC Schottky diode, on the other hand, has shown 90% less reverse recovery time, indicating a small degree of minority carrier injection for the heterojunction NiO/SiC diode.
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