用于fpga的纳米级量子点元胞自动机可配置逻辑块的设计

Hemant Balijepalli, M. Niamat
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引用次数: 18

摘要

本文提出了一种基于量子点元胞自动机(QCA)的纳米级计算方案的现场可编程门阵列(FPGA)的可配置逻辑块(CLB)的新设计。在QCA技术中,由量子点组成的细胞基于电子之间的库仑斥力将信息从一个细胞传递到另一个细胞。CLB设计背后的主要目标是最终为2020年代的“超越CMOS时代”设计一个没有晶体管的微型纳米FPGA。与之前在该领域的研究不同,这里的尝试是在构建体系结构时利用独特的QCA特性。与早期的设计相比,所提出的CLB具有更小的延迟和占用更少的细胞数量。设计了CLB的不同组件,包括(4×16)解码器、d锁存器、多路复用器和rs触发器,并使用qcaddesigner工具进行了仿真,以确保功能的正确性。
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Design of a nanoscale Quantum-dot Cellular Automata Configurable Logic Block for FPGAs
This paper presents a novel design of a Configurable Logic Block (CLB) for a Field Programmable Gate Array (FPGA) based on a computing scheme in nanoscale technology called the Quantum-dot Cellular Automata (QCA). In QCA technology, the cells made of quantum dots transmit information from one cell to the other based on Coulombic repulsion between the electrons. The main goal behind the design of the CLB is to ultimately design a miniscule nano FPGA without transistors for the `beyond CMOS era' of the 2020s. Unlike previous research in this area, the attempt here is to take advantage of the unique QCA features in building the architecture. It is found that the proposed CLB has less latency and occupies less number of cells as compared to earlier designs. Different components of the CLB including a (4×16) decoder, a D-latch, a multiplexer and an RS-flip flop are designed, and simulated using the QCADesigner tool for functional correctness.
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