Q. Ding, Rong Luo, Hui Wang, Huazhong Yang, Yuan Xie
{"title":"模拟工艺变化对临界电荷分布的影响","authors":"Q. Ding, Rong Luo, Hui Wang, Huazhong Yang, Yuan Xie","doi":"10.1109/SOCC.2006.283890","DOIUrl":null,"url":null,"abstract":"In this paper, we investigate the impact of process variation on soft error vulnerability with Monte Carlo analysis. Our simulation results show that Qcritical variation (3sigma/mean) of four types of storage circuits caused by process variation can be as large as 13.6%. We also propose an empirical model to estimate the Qcritical variation caused by gate length and threshold voltage variations. Simulation results show that this simple model is very accurate. Based on this model, the dependence of Qcritical variation on gate length variation, threshold voltage variation, and correlation between gate lengths is studied, using 70 nm SRAM as benchmark circuit.","PeriodicalId":345714,"journal":{"name":"2006 IEEE International SOC Conference","volume":"156 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"28","resultStr":"{\"title\":\"Modeling the Impact of Process Variation on Critical Charge Distribution\",\"authors\":\"Q. Ding, Rong Luo, Hui Wang, Huazhong Yang, Yuan Xie\",\"doi\":\"10.1109/SOCC.2006.283890\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we investigate the impact of process variation on soft error vulnerability with Monte Carlo analysis. Our simulation results show that Qcritical variation (3sigma/mean) of four types of storage circuits caused by process variation can be as large as 13.6%. We also propose an empirical model to estimate the Qcritical variation caused by gate length and threshold voltage variations. Simulation results show that this simple model is very accurate. Based on this model, the dependence of Qcritical variation on gate length variation, threshold voltage variation, and correlation between gate lengths is studied, using 70 nm SRAM as benchmark circuit.\",\"PeriodicalId\":345714,\"journal\":{\"name\":\"2006 IEEE International SOC Conference\",\"volume\":\"156 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"28\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International SOC Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2006.283890\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2006.283890","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Modeling the Impact of Process Variation on Critical Charge Distribution
In this paper, we investigate the impact of process variation on soft error vulnerability with Monte Carlo analysis. Our simulation results show that Qcritical variation (3sigma/mean) of four types of storage circuits caused by process variation can be as large as 13.6%. We also propose an empirical model to estimate the Qcritical variation caused by gate length and threshold voltage variations. Simulation results show that this simple model is very accurate. Based on this model, the dependence of Qcritical variation on gate length variation, threshold voltage variation, and correlation between gate lengths is studied, using 70 nm SRAM as benchmark circuit.