{"title":"单开关五阶升压变换器的分析与电压模式控制器设计","authors":"Priyabrata Shaw, M. Veerachary","doi":"10.1109/APPEEC.2017.8308985","DOIUrl":null,"url":null,"abstract":"In this paper, a digital single-loop voltage-mode controller (VMC) is designed for the non-isolated fifth-order boost converter, which exhibits low source current ripple. A detailed analysis is performed, in continuous inductor current mode of operation, to obtain the design expressions and relevant differential equations. Later on, a state-space modeling approach is extended to formulate the discrete-time models. A pole placement technique is utilized in the digital controller design to achieve required stability margins. The robustness of the closed-loop controlled system is analyzed using modulus margin (MM) concept. Simulation studies have been conducted to validate the steady-state and transient performances of the digital VMC. To confirm the analytical results, a 12 to 48 V, 25 Watt, 100 kHz prototype is developed and the closed-loop system (CLS) stability is verified for a given range of parameter uncertainties. Both simulation and experimental results depict the efficacy of the controller against source and load disturbances.","PeriodicalId":247669,"journal":{"name":"2017 IEEE PES Asia-Pacific Power and Energy Engineering Conference (APPEEC)","volume":"95 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Analysis and voltage-mode controller design for a single-switch fifth-order boost converter\",\"authors\":\"Priyabrata Shaw, M. Veerachary\",\"doi\":\"10.1109/APPEEC.2017.8308985\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a digital single-loop voltage-mode controller (VMC) is designed for the non-isolated fifth-order boost converter, which exhibits low source current ripple. A detailed analysis is performed, in continuous inductor current mode of operation, to obtain the design expressions and relevant differential equations. Later on, a state-space modeling approach is extended to formulate the discrete-time models. A pole placement technique is utilized in the digital controller design to achieve required stability margins. The robustness of the closed-loop controlled system is analyzed using modulus margin (MM) concept. Simulation studies have been conducted to validate the steady-state and transient performances of the digital VMC. To confirm the analytical results, a 12 to 48 V, 25 Watt, 100 kHz prototype is developed and the closed-loop system (CLS) stability is verified for a given range of parameter uncertainties. Both simulation and experimental results depict the efficacy of the controller against source and load disturbances.\",\"PeriodicalId\":247669,\"journal\":{\"name\":\"2017 IEEE PES Asia-Pacific Power and Energy Engineering Conference (APPEEC)\",\"volume\":\"95 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE PES Asia-Pacific Power and Energy Engineering Conference (APPEEC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APPEEC.2017.8308985\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE PES Asia-Pacific Power and Energy Engineering Conference (APPEEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APPEEC.2017.8308985","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analysis and voltage-mode controller design for a single-switch fifth-order boost converter
In this paper, a digital single-loop voltage-mode controller (VMC) is designed for the non-isolated fifth-order boost converter, which exhibits low source current ripple. A detailed analysis is performed, in continuous inductor current mode of operation, to obtain the design expressions and relevant differential equations. Later on, a state-space modeling approach is extended to formulate the discrete-time models. A pole placement technique is utilized in the digital controller design to achieve required stability margins. The robustness of the closed-loop controlled system is analyzed using modulus margin (MM) concept. Simulation studies have been conducted to validate the steady-state and transient performances of the digital VMC. To confirm the analytical results, a 12 to 48 V, 25 Watt, 100 kHz prototype is developed and the closed-loop system (CLS) stability is verified for a given range of parameter uncertainties. Both simulation and experimental results depict the efficacy of the controller against source and load disturbances.