具有状态码运算变换的时间机器的综合

M. Miroshnyk, O. Zaichenko, A. Miroshnyk, N. Zaichenko
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引用次数: 1

摘要

以减少有限状态机逻辑电路硬件费用为目标的开发方法的实际科学问题,是通过使有限状态机电路适应所实现控制算法的特点来解决的。研究对象包括有限状态机电路的优化过程。本课题研究的是有限状态机的综合模型和方法,旨在降低有限状态机电路中的硬件费用。本研究是在系统分析国内外科学家在数字控制单元领域的现代理论和应用发展成果的基础上进行的。该理论的新颖性在于提出了一种基于矩阵行列式选择操作状态转换操作常数的方法。在实践上的新颖之处在于,在Quartus中,用行为方法来实现,而不是用经典方法。
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Synthesis of Temporal Machines with Operational Transformation of State Codes
The actual scientific problem of development methods aimed at reducing of hardware expenses in the logical circuit of the finite state machine, is solved by adaptation of the finite state machine (FSM) circuit to the characteristics of the implemented control algorithm. The object of the research encompasses process of optimization of finite state machines circuits. The subject of the research is the models and methods of synthesis of finite state machines, aimed at reducing the hardware expenses in the circuit of the machine. The research is based on a systematic analysis of the results of modern theoretical and applied developments made by domestic and foreign scientists in the digital control units sphere. The theoretical novelty is distinguished by the fact that a method is proposed for choosing constants in operations for operational state transitions on the base of the determinant of the matrix. The practical novelty lies in the implementation in Quartus by the behavioral method, in contrast to the classical method.
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