Praise O. Farayola, Isaac Bruce, Shravan K. Chaganti, Abalhassan Sheikh, S. Ravi, Degang Chen
{"title":"模拟/混合信号电路测试验证的大规模多站点可变感知芯片分布估计","authors":"Praise O. Farayola, Isaac Bruce, Shravan K. Chaganti, Abalhassan Sheikh, S. Ravi, Degang Chen","doi":"10.1109/DTIS53253.2021.9505144","DOIUrl":null,"url":null,"abstract":"Massive multisite testing significantly reduces test cost and immensely increases production throughput by simultaneously screening multiple devices under test (DUTs). However, non-trivial variations in measurement from site to site are inevitable, and they often alter the actual DUTs specifications leading to yield loss (good DUTs rejected as bad) or necessitate poorer DUT specifications. These site-induced variations make it challenging to know the true silicon performance in a multisite probing environment, making statistical processing control difficult. In this paper, we propose and compare three methods to remove the variability introduced by multisite test hardware for accurate estimation of DUTs true performance distributions. The key idea is to select high confidence good test sites for parametric analysis. We demonstrate the accuracy of the proposed methods using simulation and measurement data.","PeriodicalId":435982,"journal":{"name":"2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Massive Multisite Variability-Aware Die Distribution Estimation for Analog/Mixed-Signal Circuits Test Validation\",\"authors\":\"Praise O. Farayola, Isaac Bruce, Shravan K. Chaganti, Abalhassan Sheikh, S. Ravi, Degang Chen\",\"doi\":\"10.1109/DTIS53253.2021.9505144\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Massive multisite testing significantly reduces test cost and immensely increases production throughput by simultaneously screening multiple devices under test (DUTs). However, non-trivial variations in measurement from site to site are inevitable, and they often alter the actual DUTs specifications leading to yield loss (good DUTs rejected as bad) or necessitate poorer DUT specifications. These site-induced variations make it challenging to know the true silicon performance in a multisite probing environment, making statistical processing control difficult. In this paper, we propose and compare three methods to remove the variability introduced by multisite test hardware for accurate estimation of DUTs true performance distributions. The key idea is to select high confidence good test sites for parametric analysis. We demonstrate the accuracy of the proposed methods using simulation and measurement data.\",\"PeriodicalId\":435982,\"journal\":{\"name\":\"2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-06-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DTIS53253.2021.9505144\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS53253.2021.9505144","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Massive Multisite Variability-Aware Die Distribution Estimation for Analog/Mixed-Signal Circuits Test Validation
Massive multisite testing significantly reduces test cost and immensely increases production throughput by simultaneously screening multiple devices under test (DUTs). However, non-trivial variations in measurement from site to site are inevitable, and they often alter the actual DUTs specifications leading to yield loss (good DUTs rejected as bad) or necessitate poorer DUT specifications. These site-induced variations make it challenging to know the true silicon performance in a multisite probing environment, making statistical processing control difficult. In this paper, we propose and compare three methods to remove the variability introduced by multisite test hardware for accurate estimation of DUTs true performance distributions. The key idea is to select high confidence good test sites for parametric analysis. We demonstrate the accuracy of the proposed methods using simulation and measurement data.