{"title":"面向多核可编程加速器的高效共享的以noc为中心的分区和重构技术","authors":"Marco Balboni, D. Bertozzi","doi":"10.1109/HPCSim.2015.7237107","DOIUrl":null,"url":null,"abstract":"Today, multi- and many-core architectures are gaining momentum as a potential source of hardware acceleration, bringing to new challenges for system designers related to both system virtualization and runtime testing. My research activity tackles these challenges exploiting and optimizing the capabilities of reconfiguring the routing function at runtime.","PeriodicalId":134009,"journal":{"name":"2015 International Conference on High Performance Computing & Simulation (HPCS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"NoC-centric partitioning and reconfiguration technologies for the efficient sharing of multi-core programmable accelerators\",\"authors\":\"Marco Balboni, D. Bertozzi\",\"doi\":\"10.1109/HPCSim.2015.7237107\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Today, multi- and many-core architectures are gaining momentum as a potential source of hardware acceleration, bringing to new challenges for system designers related to both system virtualization and runtime testing. My research activity tackles these challenges exploiting and optimizing the capabilities of reconfiguring the routing function at runtime.\",\"PeriodicalId\":134009,\"journal\":{\"name\":\"2015 International Conference on High Performance Computing & Simulation (HPCS)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-07-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 International Conference on High Performance Computing & Simulation (HPCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HPCSim.2015.7237107\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 International Conference on High Performance Computing & Simulation (HPCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HPCSim.2015.7237107","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
NoC-centric partitioning and reconfiguration technologies for the efficient sharing of multi-core programmable accelerators
Today, multi- and many-core architectures are gaining momentum as a potential source of hardware acceleration, bringing to new challenges for system designers related to both system virtualization and runtime testing. My research activity tackles these challenges exploiting and optimizing the capabilities of reconfiguring the routing function at runtime.