T. Finateu, I. Miro-Panadès, F. Boissieres, J. Bégueret, Y. Deval, D. Belot, F. Badets
{"title":"一个500-MHz ΣΔ相位插值直接数字合成器","authors":"T. Finateu, I. Miro-Panadès, F. Boissieres, J. Bégueret, Y. Deval, D. Belot, F. Badets","doi":"10.1109/ASSCC.2007.4425728","DOIUrl":null,"url":null,"abstract":"A SigmaDelta phase-interpolation direct digital synthesizer (DDS) is presented. This DDS generates frequencies from 400 MHz up to 500 MHz. Phase interpolation uses dual slope integration on a single capacitor and current is provided by a digital to analog converter (DAC). The SigmaDelta enables high frequency resolution and shapes quantization noise. The DDS has been integrated on a 65-nm CMOS STMicroclectronics technology. The power consumption is about 29 mVV without buffers under 1.2 V for a 500-MHz operating frequency.","PeriodicalId":186095,"journal":{"name":"2007 IEEE Asian Solid-State Circuits Conference","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"A 500-MHz ΣΔ phase-interpolation direct digital synthesizer\",\"authors\":\"T. Finateu, I. Miro-Panadès, F. Boissieres, J. Bégueret, Y. Deval, D. Belot, F. Badets\",\"doi\":\"10.1109/ASSCC.2007.4425728\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A SigmaDelta phase-interpolation direct digital synthesizer (DDS) is presented. This DDS generates frequencies from 400 MHz up to 500 MHz. Phase interpolation uses dual slope integration on a single capacitor and current is provided by a digital to analog converter (DAC). The SigmaDelta enables high frequency resolution and shapes quantization noise. The DDS has been integrated on a 65-nm CMOS STMicroclectronics technology. The power consumption is about 29 mVV without buffers under 1.2 V for a 500-MHz operating frequency.\",\"PeriodicalId\":186095,\"journal\":{\"name\":\"2007 IEEE Asian Solid-State Circuits Conference\",\"volume\":\"41 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Asian Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSCC.2007.4425728\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2007.4425728","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 500-MHz ΣΔ phase-interpolation direct digital synthesizer
A SigmaDelta phase-interpolation direct digital synthesizer (DDS) is presented. This DDS generates frequencies from 400 MHz up to 500 MHz. Phase interpolation uses dual slope integration on a single capacitor and current is provided by a digital to analog converter (DAC). The SigmaDelta enables high frequency resolution and shapes quantization noise. The DDS has been integrated on a 65-nm CMOS STMicroclectronics technology. The power consumption is about 29 mVV without buffers under 1.2 V for a 500-MHz operating frequency.