{"title":"故障分级,衡量逻辑仿真的完整性","authors":"L. Greggain, B. White","doi":"10.1109/ASIC.1989.123222","DOIUrl":null,"url":null,"abstract":"It is argued that although fault grading is generally used as a measure of the completeness of the test program, it has an even greater potential in measuring the integrity of the functional analysis as performed by the logic simulation. A brief description of stuck-at-1 and stuck-at-0 fault simulation is given. Fault simulation is contrasted with the typical controllability and observability measures, and the benefits of high fault coverage are examined. A number of standard techniques for improving fault coverage are discussed.<<ETX>>","PeriodicalId":245997,"journal":{"name":"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-09-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Fault grading, a measure of logic simulation integrity\",\"authors\":\"L. Greggain, B. White\",\"doi\":\"10.1109/ASIC.1989.123222\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"It is argued that although fault grading is generally used as a measure of the completeness of the test program, it has an even greater potential in measuring the integrity of the functional analysis as performed by the logic simulation. A brief description of stuck-at-1 and stuck-at-0 fault simulation is given. Fault simulation is contrasted with the typical controllability and observability measures, and the benefits of high fault coverage are examined. A number of standard techniques for improving fault coverage are discussed.<<ETX>>\",\"PeriodicalId\":245997,\"journal\":{\"name\":\"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-09-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1989.123222\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings., Second Annual IEEE ASIC Seminar and Exhibit,","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1989.123222","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fault grading, a measure of logic simulation integrity
It is argued that although fault grading is generally used as a measure of the completeness of the test program, it has an even greater potential in measuring the integrity of the functional analysis as performed by the logic simulation. A brief description of stuck-at-1 and stuck-at-0 fault simulation is given. Fault simulation is contrasted with the typical controllability and observability measures, and the benefits of high fault coverage are examined. A number of standard techniques for improving fault coverage are discussed.<>