F. Abbes, E. Casseau, M. Abid, P. Coussy, J.B. Legoff
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Integrating intellectual property (IP) components into system-on-chip (SoC) designs requires the use of a generic parameterizable hardware/software interface to increase reuse efficiently, quality and productivity of SoC design. In this paper, we propose a design approach for wrapping the cycle accurate bit accurate (CABA) interface of hardware IPs. This interface integrates many communication and synchronization mechanisms with respect to the virtual component interface (VCI) protocol from VSIA to fulfill IP designer and IP integrator requirements.