A low noise amplifier simultaneously achieving input impedance and minimum noise matching

A CMOS complementary capacitive loaded LNA with inductively source degeneration is implemented for 900MHz application using a 0.18-µm CMOS process. In order to achieve simultaneous input impedance and minimum noise matching, the capacitive loading technique is proposed. Owing to the capacitive loading technique, the noise figure (NF) of the proposed LNA can be perfectly close to NFmin while maintaining the source impedance matching by reducing the source degeneration inductor and gate inductor contrast to conventional cascode LNA with inductively source degeneration. The measurements demonstrate that the LNA has a power gain of 12 dB, a NF of 1 dB, an IIP3 of +7.7 dBm, and an input P1-dB of −5 dBm at 900 MHz while drawing 9 mA from a 1.8 V supply voltage.