{"title":"统计Vlsi设计的监督过程与器件仿真","authors":"H. Matsuo, H. Masuda, S. Yamamoto, T. Toyabe","doi":"10.1109/NUPAD.1990.748276","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":348970,"journal":{"name":"Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A Supervised Process And Device Simulation For Statistical Vlsi Design\",\"authors\":\"H. Matsuo, H. Masuda, S. Yamamoto, T. Toyabe\",\"doi\":\"10.1109/NUPAD.1990.748276\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\",\"PeriodicalId\":348970,\"journal\":{\"name\":\"Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits\",\"volume\":\"34 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-06-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NUPAD.1990.748276\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NUPAD.1990.748276","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}