{"title":"一种低差线性稳压器的设计","authors":"Enyu Xu, X. He","doi":"10.1109/ICAIIS49377.2020.9194883","DOIUrl":null,"url":null,"abstract":"This paper introduces a low-dropout linear regulator with an operating voltage of 2.5V. An anti-overshoot circuit is added to the error amplifier, and the regulator module is optimized based on circuit stability performance; Add trim function to feedback resistance network so that LDO can output different voltage values such as 1.1V, 1.8V and 2.2V according to various needs. The circuit is simulated by Cadence based on HLMC 40nm CMOS process. The results show that the LDO has a minimum rejection ratio of −35dB and a maximum of −56dB.","PeriodicalId":416002,"journal":{"name":"2020 IEEE International Conference on Artificial Intelligence and Information Systems (ICAIIS)","volume":"221 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Design of a Low-Dropout Linear Regulator\",\"authors\":\"Enyu Xu, X. He\",\"doi\":\"10.1109/ICAIIS49377.2020.9194883\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper introduces a low-dropout linear regulator with an operating voltage of 2.5V. An anti-overshoot circuit is added to the error amplifier, and the regulator module is optimized based on circuit stability performance; Add trim function to feedback resistance network so that LDO can output different voltage values such as 1.1V, 1.8V and 2.2V according to various needs. The circuit is simulated by Cadence based on HLMC 40nm CMOS process. The results show that the LDO has a minimum rejection ratio of −35dB and a maximum of −56dB.\",\"PeriodicalId\":416002,\"journal\":{\"name\":\"2020 IEEE International Conference on Artificial Intelligence and Information Systems (ICAIIS)\",\"volume\":\"221 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE International Conference on Artificial Intelligence and Information Systems (ICAIIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICAIIS49377.2020.9194883\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE International Conference on Artificial Intelligence and Information Systems (ICAIIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICAIIS49377.2020.9194883","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper introduces a low-dropout linear regulator with an operating voltage of 2.5V. An anti-overshoot circuit is added to the error amplifier, and the regulator module is optimized based on circuit stability performance; Add trim function to feedback resistance network so that LDO can output different voltage values such as 1.1V, 1.8V and 2.2V according to various needs. The circuit is simulated by Cadence based on HLMC 40nm CMOS process. The results show that the LDO has a minimum rejection ratio of −35dB and a maximum of −56dB.
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