F. Stellari, P. Song, M. McManus, R. Gauthier, A. Weger, K. Chatty, M. Muhammad, P. Sanda
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Optical and electrical testing of latchup in I/O interface circuits
Backside light emission and electrical measurements were used to evaluate the susceptibility to latchup of externally cabled I/O pins for a 0.13 µm technology generation [1,2] test chip, which was designed in a flip-chip package. Case studies of several Inputs/Outputs (I/Os) are shown along with conclusions regarding layout and floorplanning to ensure the robustness to various types of latchup trigger events.