{"title":"双栅MOS晶体管漏极/源极边缘效应的亚阈值表面电势建模","authors":"Satyanand Namana, S. Baishya, K. Koley","doi":"10.1109/ICEIE.2010.5559844","DOIUrl":null,"url":null,"abstract":"An analytical sub-threshold surface potential model for double gate MOSFET (DG-MOSFET) is presented incorporating the edge effects at the source and drain ends. As the gate length of DG MOSFETs is scaled down, the barrier lowering becomes very important. A fitting parameter α is introduced to compensate this effect. The results obtained with this modeled equation are well matched with the results from 2-D numerical simulator TCAD.","PeriodicalId":211301,"journal":{"name":"2010 International Conference on Electronics and Information Engineering","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2010-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A subthreshold surface potential modeling of drain/source edge effect on double gate MOS transistor\",\"authors\":\"Satyanand Namana, S. Baishya, K. Koley\",\"doi\":\"10.1109/ICEIE.2010.5559844\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An analytical sub-threshold surface potential model for double gate MOSFET (DG-MOSFET) is presented incorporating the edge effects at the source and drain ends. As the gate length of DG MOSFETs is scaled down, the barrier lowering becomes very important. A fitting parameter α is introduced to compensate this effect. The results obtained with this modeled equation are well matched with the results from 2-D numerical simulator TCAD.\",\"PeriodicalId\":211301,\"journal\":{\"name\":\"2010 International Conference on Electronics and Information Engineering\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-09-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 International Conference on Electronics and Information Engineering\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEIE.2010.5559844\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Conference on Electronics and Information Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEIE.2010.5559844","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A subthreshold surface potential modeling of drain/source edge effect on double gate MOS transistor
An analytical sub-threshold surface potential model for double gate MOSFET (DG-MOSFET) is presented incorporating the edge effects at the source and drain ends. As the gate length of DG MOSFETs is scaled down, the barrier lowering becomes very important. A fitting parameter α is introduced to compensate this effect. The results obtained with this modeled equation are well matched with the results from 2-D numerical simulator TCAD.
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