S. Soni, Amisha Kaushik, V. Niranjan, Ashwini Kumar
{"title":"采用自适应偏置技术的高速、高效、高性能OTA","authors":"S. Soni, Amisha Kaushik, V. Niranjan, Ashwini Kumar","doi":"10.1109/ICCCIS48478.2019.8974555","DOIUrl":null,"url":null,"abstract":"This Paper presents proposed noble technology to perform fast operation of CMOS Operational transconductance amplifier (OTA). In this paper Gain enhancement technique implies positive feedback system to enhance the overall performance of the circuit output. For fast operation of OTA NMOS adaptive biasing is used with 5.5$\\mu$ A Quiescent current source (IB). Miller frequency compensation is used to provide stability to the circuit. Comparative study has been done in tabular and graphical form. This work has been done on 18$\\theta$ nm technology using EDA Cadence Virtuoso for schematic designing and other analysis. At input 1. 8V supply voltage 94. 12dB gain is measured with 294nW with 35.23$\\displaystyle \\frac{V}{\\mu s}$ and-37.5 $\\displaystyle \\frac{\\gamma}{\\mu s}$ positive and negative slew rate respectively. Power consumption and load capacitance CL is of 2 $\\theta$ pf is used to take output.","PeriodicalId":436154,"journal":{"name":"2019 International Conference on Computing, Communication, and Intelligent Systems (ICCCIS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"High Speed Power Efficient, Noble Performance OTA Using Adaptive Biasing Technique\",\"authors\":\"S. Soni, Amisha Kaushik, V. Niranjan, Ashwini Kumar\",\"doi\":\"10.1109/ICCCIS48478.2019.8974555\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This Paper presents proposed noble technology to perform fast operation of CMOS Operational transconductance amplifier (OTA). In this paper Gain enhancement technique implies positive feedback system to enhance the overall performance of the circuit output. For fast operation of OTA NMOS adaptive biasing is used with 5.5$\\\\mu$ A Quiescent current source (IB). Miller frequency compensation is used to provide stability to the circuit. Comparative study has been done in tabular and graphical form. This work has been done on 18$\\\\theta$ nm technology using EDA Cadence Virtuoso for schematic designing and other analysis. At input 1. 8V supply voltage 94. 12dB gain is measured with 294nW with 35.23$\\\\displaystyle \\\\frac{V}{\\\\mu s}$ and-37.5 $\\\\displaystyle \\\\frac{\\\\gamma}{\\\\mu s}$ positive and negative slew rate respectively. Power consumption and load capacitance CL is of 2 $\\\\theta$ pf is used to take output.\",\"PeriodicalId\":436154,\"journal\":{\"name\":\"2019 International Conference on Computing, Communication, and Intelligent Systems (ICCCIS)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 International Conference on Computing, Communication, and Intelligent Systems (ICCCIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCCIS48478.2019.8974555\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International Conference on Computing, Communication, and Intelligent Systems (ICCCIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCCIS48478.2019.8974555","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High Speed Power Efficient, Noble Performance OTA Using Adaptive Biasing Technique
This Paper presents proposed noble technology to perform fast operation of CMOS Operational transconductance amplifier (OTA). In this paper Gain enhancement technique implies positive feedback system to enhance the overall performance of the circuit output. For fast operation of OTA NMOS adaptive biasing is used with 5.5$\mu$ A Quiescent current source (IB). Miller frequency compensation is used to provide stability to the circuit. Comparative study has been done in tabular and graphical form. This work has been done on 18$\theta$ nm technology using EDA Cadence Virtuoso for schematic designing and other analysis. At input 1. 8V supply voltage 94. 12dB gain is measured with 294nW with 35.23$\displaystyle \frac{V}{\mu s}$ and-37.5 $\displaystyle \frac{\gamma}{\mu s}$ positive and negative slew rate respectively. Power consumption and load capacitance CL is of 2 $\theta$ pf is used to take output.