{"title":"采用噪声压缩的8GHz, 0.45dB NF CMOS LNA","authors":"Wooram Lee, E. Afshari","doi":"10.1109/RFIC.2011.5940695","DOIUrl":null,"url":null,"abstract":"A LNA using noise squeezing is designed in a 65 nm CMOS. The noise squeezing occurs through phase sensitive gain implemented by parametric process. This process is carried out inside a nonlinear resonator where energy transfers from a pump to the signal. When the pump frequency is twice that of the signal, the amplifier suppresses one of two quadrature components of the input noise. This concept is exploited to realize an 8 GHz LNA with 0.45 dB NF for non-suppressed quadrature.","PeriodicalId":448165,"journal":{"name":"2011 IEEE Radio Frequency Integrated Circuits Symposium","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An 8GHz, 0.45dB NF CMOS LNA employing noise squeezing\",\"authors\":\"Wooram Lee, E. Afshari\",\"doi\":\"10.1109/RFIC.2011.5940695\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A LNA using noise squeezing is designed in a 65 nm CMOS. The noise squeezing occurs through phase sensitive gain implemented by parametric process. This process is carried out inside a nonlinear resonator where energy transfers from a pump to the signal. When the pump frequency is twice that of the signal, the amplifier suppresses one of two quadrature components of the input noise. This concept is exploited to realize an 8 GHz LNA with 0.45 dB NF for non-suppressed quadrature.\",\"PeriodicalId\":448165,\"journal\":{\"name\":\"2011 IEEE Radio Frequency Integrated Circuits Symposium\",\"volume\":\"73 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-06-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE Radio Frequency Integrated Circuits Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2011.5940695\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE Radio Frequency Integrated Circuits Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2011.5940695","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
摘要
设计了一种基于噪声压缩的65纳米CMOS LNA。噪声压缩是通过参数化过程实现的相敏增益实现的。这个过程在一个非线性谐振腔内进行,其中能量从泵传递到信号。当泵浦频率是信号频率的两倍时,放大器抑制输入噪声的两个正交分量中的一个。利用这一概念实现了具有0.45 dB NF的8 GHz LNA,用于非抑制正交。
An 8GHz, 0.45dB NF CMOS LNA employing noise squeezing
A LNA using noise squeezing is designed in a 65 nm CMOS. The noise squeezing occurs through phase sensitive gain implemented by parametric process. This process is carried out inside a nonlinear resonator where energy transfers from a pump to the signal. When the pump frequency is twice that of the signal, the amplifier suppresses one of two quadrature components of the input noise. This concept is exploited to realize an 8 GHz LNA with 0.45 dB NF for non-suppressed quadrature.