Dimitrios Baxevanakis;Dimitris Nikitas;Paul P. Sotiriadis
{"title":"cta:高线性和高效率功率级架构的概念和理论分析","authors":"Dimitrios Baxevanakis;Dimitris Nikitas;Paul P. Sotiriadis","doi":"10.1109/OJCAS.2023.3329723","DOIUrl":null,"url":null,"abstract":"This work presents a power stage architecture that combines high–linearity with high–efficiency. The power stage is configured as a push–pull Class–A topology with two buck–converters providing its supply rails. The buck–converters continuously track the stage’s output with a small constant margin, creating a minimum, constant voltage drop on the output devices; thus, the stage’s efficiency is increased and its linearity is improved. Theoretical analysis of the topology and its feedback control are presented, while a design example is implemented and simulated in Cadence Spectre as proof–of–concept.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":null,"pages":null},"PeriodicalIF":2.4000,"publicationDate":"2023-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10305243","citationCount":"0","resultStr":"{\"title\":\"Class–CTA: Concept and Theoretical Analysis of a High Linearity and Efficiency Power Stage Architecture\",\"authors\":\"Dimitrios Baxevanakis;Dimitris Nikitas;Paul P. Sotiriadis\",\"doi\":\"10.1109/OJCAS.2023.3329723\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents a power stage architecture that combines high–linearity with high–efficiency. The power stage is configured as a push–pull Class–A topology with two buck–converters providing its supply rails. The buck–converters continuously track the stage’s output with a small constant margin, creating a minimum, constant voltage drop on the output devices; thus, the stage’s efficiency is increased and its linearity is improved. Theoretical analysis of the topology and its feedback control are presented, while a design example is implemented and simulated in Cadence Spectre as proof–of–concept.\",\"PeriodicalId\":93442,\"journal\":{\"name\":\"IEEE open journal of circuits and systems\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":2.4000,\"publicationDate\":\"2023-11-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10305243\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE open journal of circuits and systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10305243/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE open journal of circuits and systems","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10305243/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Class–CTA: Concept and Theoretical Analysis of a High Linearity and Efficiency Power Stage Architecture
This work presents a power stage architecture that combines high–linearity with high–efficiency. The power stage is configured as a push–pull Class–A topology with two buck–converters providing its supply rails. The buck–converters continuously track the stage’s output with a small constant margin, creating a minimum, constant voltage drop on the output devices; thus, the stage’s efficiency is increased and its linearity is improved. Theoretical analysis of the topology and its feedback control are presented, while a design example is implemented and simulated in Cadence Spectre as proof–of–concept.