An 11-Level Adiabatic Ultrasonic Pulser Achieving 87.2% Dynamic Power Reduction

This letter introduces a pulser topology that allows switched-capacitor adiabatic drivers (SCADs) to exploit an H-bridge for doubling the output voltage swing across an ultrasonic transducer (UT) from $V_{DD}$ to $2V_{DD}$ . The topology enables a fourfold increase in the output power of an $N$ -step SCAD while reducing the switching loss of the internal capacitance of a UT by $\sim 10\times $ . A periodically switched flying ladder of capacitors is employed to balance the voltages across the $N -1$ charge-recycling capacitors in an $N$ -step SCAD at integer multiples of $V_{DD}/N$ against the imbalance produced by an H-bridge or a UT of high power factor. In this way, an H-bridge can be combined with an SCAD to flip the polarity of the voltage applied across a UT every half cycle, effectively lowering the number of required charge-recycling capacitors and intermediate switches for a given number of steps by 2. Measurements of a 0.18- $\mu \text{m}$ CMOS prototype demonstrate a switching loss reduction of up to 87.2% and a peak ultrasonic driving efficiency of 92.9%.