利用时间到事件边际传播进行地址到事件表示的神经形态计算

IF 3.7 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Journal on Emerging and Selected Topics in Circuits and Systems Pub Date : 2023-10-31 DOI:10.1109/JETCAS.2023.3328916
R. Madhuvanthi Srivatsav;Shantanu Chakrabartty;Chetan Singh Thakur
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引用次数: 0

摘要

地址-事件-表示(AER)是一种尖峰路由协议,可以扩展神经形态和尖峰神经网络(SNN)架构。然而,在传统的神经形态架构中,AER 协议和一般的虚拟互连在计算中仅扮演被动角色,即仅用于路由尖峰和事件。在本文中,我们展示了如何利用 AER 协议本身固有的因果时间基元(如延迟、触发和排序),通过我们提出的时间到事件边际传播(TEMP)技术,实现可扩展的神经形态计算。所提出的基于 TEMP 的 AER 架构是完全异步的,它依赖于内存和计算的互连延迟,而不是传统的本地乘法累加 (MAC) 操作。我们的研究表明,TEMP 神经网络中基于时间的编码产生了一种时空表示,可以编码大量的判别模式。作为概念验证,我们展示了经过训练的基于 TEMP 的卷积神经网络 (CNN) 在 MNIST 数据集上的准确率超过 99%,在时尚 MNIST 数据集上的准确率超过 91.2%。总之,我们的工作是一种受生物启发的计算范例,为神经形态计算领域带来了新的研究维度。
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Neuromorphic Computing With Address-Event-Representation Using Time-to-Event Margin Propagation
Address-Event-Representation (AER) is a spike-routing protocol that allows the scaling of neuromorphic and spiking neural network (SNN) architectures. However, in conventional neuromorphic architectures, the AER protocol and in general, any virtual interconnect plays only a passive role in computation, i.e., only for routing spikes and events. In this paper, we show how causal temporal primitives like delay, triggering, and sorting inherent in the AER protocol itself can be exploited for scalable neuromorphic computing using our proposed technique called Time-to-Event Margin Propagation (TEMP). The proposed TEMP-based AER architecture is fully asynchronous and relies on interconnect delays for memory and computing as opposed to conventional and local multiply-and-accumulate (MAC) operations. We show that the time-based encoding in the TEMP neural network produces a spatio-temporal representation that can encode a large number of discriminatory patterns. As a proof-of-concept, we show that a trained TEMP-based convolutional neural network (CNN) can demonstrate an accuracy greater than 99% on the MNIST dataset and 91.2% on the Fashion MNIST Dataset. Overall, our work is a biologically inspired computing paradigm that brings forth a new dimension of research to the field of neuromorphic computing.
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来源期刊
CiteScore
8.50
自引率
2.20%
发文量
86
期刊介绍: The IEEE Journal on Emerging and Selected Topics in Circuits and Systems is published quarterly and solicits, with particular emphasis on emerging areas, special issues on topics that cover the entire scope of the IEEE Circuits and Systems (CAS) Society, namely the theory, analysis, design, tools, and implementation of circuits and systems, spanning their theoretical foundations, applications, and architectures for signal and information processing.
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Introducing IEEE Collabratec Table of Contents Erratum to “A Reconfigurable Spatial Architecture for Energy-Efficient Inception Neural Networks” Guest Editorial: Toward Trustworthy AI: Advances in Circuits, Systems, and Applications IEEE Journal on Emerging and Selected Topics in Circuits and Systems Publication Information
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