用于HDD飞高电阻传感器的0.13 μm BiCMOS、130 mhz带宽消噪接口电路

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Solid-State Circuits Letters Pub Date : 2023-10-13 DOI:10.1109/LSSC.2023.3324589
M. M. Abdevand;D. Livornesi;A. E. Vergani;F. Piscitelli;E. Mammei;E. Bonizzoni;P. Malcovati;P. Pulici
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引用次数: 0

摘要

本文介绍了一种基于闭环偏置和噪声消除技术的全模拟接口电路,该电路采用130纳米BiCMOS技术制造。所提出的接口电路能够精确地偏置传感器并在两个频率范围(低频(LF)范围从dc到375 kHz和高频范围从1 kHz到130 MHz)中读出结果信号。在低频范围内,由于专用的降噪技术,所实现的综合输入参考噪声在100 hz至1 khz频段分别从7.3 $\mu \text{V}_{\mathrm{rms}}$降至2.8 $\mu \text{V}_{\mathrm{rms}}$,在1- 100 khz频段分别从14.2 $\mu \text{V}_{\mathrm{rms}}$降至4.6 $\mu \text{V}_{\mathrm{rms}}$。该芯片的有效面积为1.11 mm2,功耗为172 mW,其中包括传感器偏置所需的36 mW。
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A 0.13-μm BiCMOS, 130-MHz Bandwidth Interface Circuit With Noise Canceling for HDD Fly-Height Resistive Sensors
A fully analog interface circuit based on closed-loop biasing and noise canceling techniques, fabricated in a 130-nm BiCMOS technology, is presented in this letter. The proposed interface circuit is able to precisely bias the sensor and read out the resulting signal in two frequency ranges (low-frequency (LF) range from dc to 375 kHz and high-frequency range from 1 kHz to 130 MHz). In the LF range, thanks to a dedicated noise-canceling technique, the achieved integrated input-referred noise is reduced from 7.3 $\mu \text{V}_{\mathrm{ rms}}$ to 2.8 $\mu \text{V}_{\mathrm{ rms}}$ in the 100-Hz to 1-kHz band and from 14.2 $\mu \text{V}_{\mathrm{ rms}}$ to 4.6 $\mu \text{V}_{\mathrm{ rms}}$ in the 1–100-kHz band, respectively. The fabricated chip features an active area of 1.11 mm2 and consumes 172 mW of power, including the 36 mW required to bias the sensor.
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来源期刊
IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
3.70%
发文量
52
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