In-Situ TEM Observation of Tungsten Migration at Elevated Temperatures

Abstract The growing demand for flash memory in the artificial intelligence and big data industries has driven the development of Negative AND (NAND) gates. To increase yield and cost competitiveness, NAND has evolved to stack gates vertically, resulting in vertical NAND (VNAND) technology. However, this advancement has led to challenges, such as high aspect ratio-related difficulties and word line (WL) metal Tungsten (W) substitution process defects. In this study, we investigated Voltage Blocking Oxide Barrier (VBB) defects in VNAND cells under high-temperature conditions using in-situ heating TEM. By artificially creating VBB defect environments within VNAND cells and analyzing structural and chemical changes, we identified VBB defects expression phenomenon caused by residual HF(g) in metal voids during post-metal replacement processes. Our findings offer insights into defect-inducing heat treatment conditions affecting VBB in VNAND devices and propose directions for next-generation NAND flash processes.