Design of a CMOS based ring VCO using particle swarm optimisation

This work investigates performance improvement the of ring voltage-controlled oscillator. Particle swarm optimization (PSO) techniques are used on both the physical and schematic levels to optimize the design parameter values (width of the NMOS “\({\mathrm{W}}_{\mathrm{n}}\)” and PMOS “\({\mathrm{W}}_{\mathrm{p}}\)”). By utilizing this strategy, multiple time-taking iterations can be reduced and done in a single cycle, thereby increasing the likelihood that the ring VCO will function to the best of its ability. After getting the optimized values for the design parameters of the ring VCO’s, the circuit has been designed for the performance analysis. The same is demonstrated by evaluating the performance of the circuit and confirming the results of the transient analysis and noise analysis carried out with Cadence tools under a variety of different operating conditions using the 45 nm technology process. The analysis has been carried out in a variety of PVT corners (fast–fast, slow–slow, fast–slow, and slow–fast).