Lucas Amilton Martins , Felipe Viel , Laio Oriel Seman , Eduardo Augusto Bezerra , Cesar Albenes Zeferino
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The increased utilization of these images has garnered the interest of researchers striving to create solutions that may enable faster processing of the images via </span></span></span>parallel processing<span>. In this context, FPGA<span><span> technology is an option capable of facilitating the implementation of such a system for observation satellites. This research is situated within this framework and aims to develop an FPGA-synthesized hardware accelerator to facilitate real-time hyperspectral image categorization. By taking this approach, hardware-specific solutions can be implemented for embedded applications that process hyperspectral images and can also be integrated with further </span>image processing<span> steps. The proposed accelerator was constructed based on an advanced algorithmic model, resulting in outcomes consistent with those generated by the software-based solution. The experimental results demonstrate that the engineered accelerator can attain a pixel classification time equal to or less than the pixel acquisition time, thus conforming to the real-time processing criteria concerning classification time. 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引用次数: 0
摘要
高光谱成像可以理解为与特定景观相关的光谱信息的三维数据集。一般来说,这些都是地球观测卫星拍摄的航空照片。高光谱图像的一个有用类比是一个立方体,图像沿 X 轴和 Y 轴采集,第三维是不同波长的光谱带。由于这些图像中包含大量数据,它们已被应用于民用和军用领域,如地形识别、城市发展监督、稀有矿物识别和其他各种目标。这些图像的使用率不断提高,引起了研究人员的兴趣,他们努力创造解决方案,以便通过并行处理更快地处理图像。在这种情况下,FPGA 技术是一种能够为观测卫星实施此类系统提供便利的选择。本研究就是在这一框架内进行的,旨在开发一种 FPGA 合成硬件加速器,以促进实时高光谱图像分类。通过这种方法,可以为处理高光谱图像的嵌入式应用程序实施特定的硬件解决方案,还可以与进一步的图像处理步骤集成。所建议的加速器是根据先进的算法模型构建的,其结果与基于软件的解决方案所产生的结果一致。实验结果表明,工程加速器的像素分类时间等于或小于像素采集时间,因此符合有关分类时间的实时处理标准。此外,制造的加速器还具有可扩展性,可同时对不同类别的数据集进行分类,同时保持统一的逻辑资源利用率。
A real-time SVM-based hardware accelerator for hyperspectral images classification in FPGA
Hyperspectral imaging can be conceptualized as a three-dimensional dataset of spectral information related to a particular landscape. Generally speaking, these are aerial photographs captured by Earth observation satellites. A useful analogy for a hyperspectral image is one of a cube formed with the image acquired along the X and Y axes and a third dimension of spectral bands of varying wavelengths. Given the wealth of data contained within these images, they have been employed in both civilian and military applications such as terrain recognition, urban development supervision, recognition of rare minerals, and various other objectives. The increased utilization of these images has garnered the interest of researchers striving to create solutions that may enable faster processing of the images via parallel processing. In this context, FPGA technology is an option capable of facilitating the implementation of such a system for observation satellites. This research is situated within this framework and aims to develop an FPGA-synthesized hardware accelerator to facilitate real-time hyperspectral image categorization. By taking this approach, hardware-specific solutions can be implemented for embedded applications that process hyperspectral images and can also be integrated with further image processing steps. The proposed accelerator was constructed based on an advanced algorithmic model, resulting in outcomes consistent with those generated by the software-based solution. The experimental results demonstrate that the engineered accelerator can attain a pixel classification time equal to or less than the pixel acquisition time, thus conforming to the real-time processing criteria concerning classification time. Further, the manufactured accelerator exhibits scalability that can classify distinct datasets with varying classes concurrently while maintaining a uniform logic resource utilization.
期刊介绍:
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO) is a journal covering all design and architectural aspects related to embedded systems hardware. This includes different embedded system hardware platforms ranging from custom hardware via reconfigurable systems and application specific processors to general purpose embedded processors. Special emphasis is put on novel complex embedded architectures, such as systems on chip (SoC), systems on a programmable/reconfigurable chip (SoPC) and multi-processor systems on a chip (MPSoC), as well as, their memory and communication methods and structures, such as network-on-chip (NoC).
Design automation of such systems including methodologies, techniques, flows and tools for their design, as well as, novel designs of hardware components fall within the scope of this journal. Novel cyber-physical applications that use embedded systems are also central in this journal. While software is not in the main focus of this journal, methods of hardware/software co-design, as well as, application restructuring and mapping to embedded hardware platforms, that consider interplay between software and hardware components with emphasis on hardware, are also in the journal scope.