Architecture design of intelligent image sensor integrated with detection and processing

This paper first introduces the application background of detection and processing integrated intelligent image sensor, and proposes an overall architecture of intelligent image sensor that uses hybrid stacking process for vertical interconnection. Among them, the top pixel layer mainly contains 10K×10K 5um pixel array and row and column drive array, which gives the pixel structure, simulates and analyzes the pixel noise index and effectively guides the design of the readout circuit structure. The lower chip layer mainly contains readout circuits, image signal processing ISPs, general-purpose CPU units, AI neural processing units, and on-chip SRAM. The image signal processing ISP function and the AI neural processing unit are introduced in detail, and the FPGA verification results of the AI neural processing unit are given.