A highly scalable Self-organizing Map accelerator on FPGA and its performance evaluation

Self-organizing Map (SOM) is one of the artificial neural networks and well applied to datamining or feature visualization of high-dimensional datasets. Recently, SOMs are actively used for market research, political decision-making, and social analysis using a huge number of live text-data. The SOM, however, needs a large number of parameters and iterative calculations like Deep Learning, so that specialized accelerators for SOM are strongly required. In this paper, we newly propose a scalable SOM accelerator based on FPGA, in which all neurons in the SOM are mapped onto an internal memory, or BRAM (Block-RAM) in FPGA to maintain high parallelism in the SOM itself. We implement the proposed SOM accelerator on an Alveo U50 (Xilinx, Ltd.) and evaluate its performance: the accelerator shows high scalability and runs 102.0 times faster than software processing with Intel Core i7, which is expected to be enough for the real-time datamining and feature visualization.