基于电磁耦合 D 类 LC 振荡器和谐振 LC 飞行阻抗的 1.5 GHz 全集成 DC-DC 转换器,可实现 4.1-W/mm2 峰值功率密度和 77% 峰值效率

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Solid-State Circuits Letters Pub Date : 2023-12-08 DOI:10.1109/LSSC.2023.3341049
Alessandro Novello;Gabriele Atzeni;Tim Keller;Taekwang Jang
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引用次数: 0

摘要

本文介绍了一种基于电磁耦合 D 类 LC 振荡器 (EMLC) 的全集成 DC-DC 转换器,该器件采用 22 纳米 FDSOI CMOS 工艺制造。该转换器采用谐振 LC 飞行阻抗,通过在飞行电容器 CFLY 和负载电容器 CO 之间实现谐振电荷转移来提高 EMLC 输出电阻。该设计的峰值效率为 77%,峰值功率密度为 4.1 W/mm2,总面积为 0.33 mm2。输出电压通过占空比循环方案调节,从 0.003 W/mm2 到 2.1 W/mm2,效率损失小于 2%。
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A 1.5-GHz Fully Integrated DC–DC Converter Based on Electromagnetically Coupled Class-D LC Oscillators and Resonant LC Flying Impedance Achieving 4.1-W/mm2 Peak Power Density and 77% Peak Efficiency
This letter introduces a fully integrated DC–DC converter based on electromagnetically coupled class-D LC oscillators (EMLC) manufactured in a 22nm FDSOI CMOS process. The proposed converter implements a resonant LC flying impedance that improves the EMLC output resistance by accomplishing a resonant charge transfer between the flying capacitor CFLY and the load capacitor CO. This design achieves 77% peak efficiency and 4.1 W/mm2 peak power density in a total area of 0.33 mm2. The output voltage is regulated with a duty cycling scheme from 0.003 W/mm2 up to 2.1 W/mm2 with < 2% efficiency loss.
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来源期刊
IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
3.70%
发文量
52
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