利用门切割和线切割优化量子电路分区

Sebastian Brandhofer;Ilia Polian;Kevin Krsulich
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引用次数: 0

摘要

量子比特数量有限、错误率高以及量子比特连接性有限是近期有效量子计算面临的主要挑战。量子电路分区将量子计算分为经典后处理步骤和一系列更小规模的量子计算,这些计算各自需要的量子比特更少,量子比特连接性更低,通常产生的误差也更小。然而,由于分区通常会使量子计算的持续时间与所需的分区工作成指数级增长,因此选择最佳分区点(即所谓的切割)并使用最佳切割实现至关重要。在这项工作中,我们开发了首个最优分区方法,该方法依赖于量子电路编织来实现最优切割,以及线切割和门切割的最优选择,从而以减少量子计算时间来换取辅助量子比特的插入。与之前的量子电路分区方法相比,利用这种组合,所开发的方法平均减少了 41% 的量子计算运行时间。此外,在运行时间预算为一小时、采样频率为 1 kHz 的情况下,所评估量子电路的量子比特需求平均减少了 40%。这些结果凸显了以往量子电路划分方法的优化差距,以及近期量子计算机计算范围的可能扩展。
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Optimal Partitioning of Quantum Circuits Using Gate Cuts and Wire Cuts
A limited number of qubits, high error rates, and limited qubit connectivity are major challenges for effective near-term quantum computations. Quantum circuit partitioning divides a quantum computation into classical postprocessing steps and a set of smaller scale quantum computations that individually require fewer qubits, lower qubit connectivity, and typically incur less error. However, as partitioning generally increases the duration of a quantum computation exponentially in the required partitioning effort, it is crucial to select optimal partitioning points, so-called cuts, and to use optimal cut realizations. In this work, we develop the first optimal partitioning method relying on quantum circuit knitting for optimal cut realizations and an optimal selection of wire cuts and gate cuts that trades off ancilla qubit insertions for a decrease in quantum computing time. Using this combination, the developed method demonstrates a reduction in quantum computing runtime by 41% on average compared to previous quantum circuit partitioning methods. Furthermore, the qubit requirement of the evaluated quantum circuits was reduced by 40% on average for a runtime budget of one hour and a sampling frequency of 1 kHz. These results highlight the optimality gap of previous quantum circuit partitioning methods and the possible extension in the computational reach of near-term quantum computers.
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