Digital synchronization of the MACM chaotic system by using PIC24-microcontrollers and the SPI-protocol

In recent years, chaotic synchronization has received a lot of interest in applications in different fields such as digital applications. The purpose of this work is to achieve the synchronization of the discretized version (DV) of the Méndez–Arellano–Cruz–Martínez (MACM) 3D chaotic system (CS) as master which is coupled to one or more MACM 3D CSs as slaves for three different applications. The Lyapunov Exponents (LEs) analysis is conducted using the numerical-algorithm in MATLAB in order to verify the chaos existence is preserved in the Continuous Version(CV) and DV of the two master–slave MACM CSs once that they are synchronized. Subsequently, the algorithm of the MACM CSs are implemented in two or more isolated embedded systems (ESs) using PIC-24 16-bit microcontrollers which are communicated using the Serial Peripheral Interface (SPI) protocol setting in 16-bits, and the synchronization is validated using the state-variables depicted in digital-to-analog converters (DACs), and the secret-image messages are validated in thin-film-transistor-liquid-crystal displays (TFT-LCDs) depending of the conducted application. In addition, one k-parameter switch is proposed in order to validate the enabled or disabled the synchronization between the master with one or many slave microcontrollers using a 16-bit numerical scaling-arrangement. The first application is the electronic-digital-implementation of the synchronization in real-time of 5 PIC-24 microcontrollers coupled in star-topology, 1 MACM-CS master-node, and 4 MACM-CSs slave-nodes. The second application is the synchronization of the two MACM CSs which are coupled and implemented in two PIC-24 microcontrollers, the master-node is setting to encrypt and transmit a secret-message which involves data to achieve the synchronization and to re-built an image once that the image is received, decrypted and depicted in the TFT-LCD in the slave-node in real-time. The third application is showing the synchronization of the 2 nodes where the message is an decomposed-image stored in a vector-data block in the SRAM (Static Random Access Memory, the stored-data remain in the memory only if the PIC-24 microcontrollers are powered) of the PIC-24 microcontrollers which the process is conducted encrypting and transmitting a secret-message using data to achieve the synchronization and elements of a pixel per finite sample-iterations to receive and decrypt the message in the PIC-24 microcontroller as slave-node, and later the message is re-built in a TFT-LCD. Finally, all the numerical results of the LE studies, comparative security analysis, and the numerical and experimental synchronization of the proposed three applications were validated in the ESs.